发明名称 Method and apparatus for memory access scheduling in a video graphics system
摘要 A method and apparatus for sequencing memory accesses in a video graphics system such that page faults are effectively hidden is accomplished by receiving a memory access request from one of a plurality of clients, where the plurality of clients includes both linear clients and tiled memory clients. The clients access data stored in a memory that includes at least two banks. Once the memory request has been received, it is evaluated based on other pending requests in order to determine the optimal ordering pattern for execution of the memory requests. The optimal ordering pattern typically includes sequencing alternating accesses between the two banks of the memory such that when a page fault is occurring in one bank of the memory, a memory access is occurring in the opposing bank. Once the ordering of the memory requests has been performed, the requests are executed.
申请公布号 US6297832(B1) 申请公布日期 2001.10.02
申请号 US19990224692 申请日期 1999.01.04
申请人 ATI INTERNATIONAL SRL 发明人 MIZUYABU CARL K.;CHOW PAUL;SWAN PHILIP L.;WANG CHUN
分类号 G06T1/60;G06T15/00;G09G5/39;(IPC1-7):G06G5/399 主分类号 G06T1/60
代理机构 代理人
主权项
地址
您可能感兴趣的专利