| 摘要 |
A buffer circuit according to the present invention is designed to change a driving amplitude to a data line in accordance with a specific gate circuit. Therefore, when the position of the gate circuit is far from the buffer circuit, the driving amplitude is increased, and when it is near to the buffer circuit, the driving amplitude is decreased, so that it is possible to achieve both of the reduction of current consumption and the improvement of the operating frequency while maintaining the operating frequency. Specifically, the buffer circuit changes its driving amplitude on the basis of, e.g., the position of a bit line and/or word line which are connected to a memory cell in which data are written. The positions of the bit lines and word lines can be distinguished by referring to at least part of an address or information obtained by decoding the address. Preferably, the buffer circuit drives the data line so that the difference between data rewriting times in memory cells connected to the same word line or the same bit line or in all of memory cells in the memory cell array is small. More preferably, memory cell arrays and buffer circuits are provided so as to make pairs, respectively, and the positions of memory cells in which data are written at the same timing are determined so that the driving amplitude of one of the buffer circuit increase when the driving amplitude of the other buffer circuit is small. Thus, the maximum value of current consumption can be suppressed.
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