DEVICE AND METHOD FOR BUS ENCODING/DECODING

摘要

PROBLEM TO BE SOLVED: To provide a device and method for bus-encoding/decoding for a low power digital signal processor system using a narrow data bus. SOLUTION: This device is provided with a conditional inverting means for inverting lower (n-1) bit data by bit units when the value of the most significant bit of n bit data is 1, a storing means for storing the last n bit data outputted to a bus, and a first exclusive logical sum calculating means for calculating the exclusive logical sum of the lower (n-1) bit data conditionally inverted by the conditional inverting means and the lower (n-1) bit data stored in the storing means by bit units. Then, the most significant bit data of the n bit data and the (n-1) bit data calculated as the exclusive logical sum by the first exclusive logical sum calculating means are outputted.