Method and an integrated circuit for controlling access of at least two masters to a common bus

摘要

In this method, access to the bus is controlled by a policy assigning graded priorities to the various masters so that a new priority master succeeds a current master on the bus as soon as that current master leaves the bus. The priority assignment policy is implemented by logic gates integrated into a circuit, for example an application-specific integrated circuit. Each master is assigned a time slot for occupying the bus, said slot constituting a modifiable parameter specific to the master to which it is assigned. The priority assignment policy is preferably a last recently used policy whereby the highest priority level is assigned to the least recently used master.