发明名称 |
METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT HAVING MULTILAYER WIRING STRUCTURE |
摘要 |
A method of manufacturing an LSI comprising the steps of forming basic elements such as transistors on a semiconductor substrate, stacking a plurality of wiring layers on the substrate, connecting the wiring layers to the basic elements to construct sub-circuits, connecting the sub-circuits to fabricate sub-circuits of large scales, and further successively enlarging the scales of the sub-circuits to form a complex constitution, wherein, at a stage when an intermediate wiring layer has been formed, 100% inspection, function inspection, stuck fault inspection, static power-source current inspection, and the like, of the basic elements and sub-circuits that have bean wire-connected are performed. Thereafter wiring connection inspection is conducted at every completion of a wiring layer. Failure detection rate is enhanced, and inspection cost and manufacturing cost are reduced. |
申请公布号 |
WO0163661(A1) |
申请公布日期 |
2001.08.30 |
申请号 |
WO2001JP01292 |
申请日期 |
2001.02.22 |
申请人 |
ADVANTEST CORPORATION;SOMA, MANI;MAEDA, YASUHIRO;ISHIDA, MASAHIRO;YAMAGUCHI, TAKAHIRO |
发明人 |
SOMA, MANI;MAEDA, YASUHIRO;ISHIDA, MASAHIRO;YAMAGUCHI, TAKAHIRO |
分类号 |
H01L21/66;(IPC1-7):H01L21/66 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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