| 摘要 |
PROBLEM TO BE SOLVED: To provide another DRAM cell array in which each memory cell has one transistor and one capacitor. SOLUTION: The DRAM cell array is constituted in such a way that a second recessed section is provided on a substrate at an interval from a first recessed section and the gate electrode of a transistor is arranged on at least the internal side face of the second recessed section and separated from the substrate by means of gate dielectrics which is in contact with at least the side face of the first recessed section. In the substrate, in addition, a source/drain area is arranged above the transistor in such a way that the area comes into contact with the second recessed section and a memory node in a contact area on the side face of the first recessed section and a source/drain area is arranged below the transistor in such a way that the area becomes deeper in depth than the source/drain area above the transistor and comes into contact with the second recessed section. |
