发明名称 |
ATM CELL SCHEDULER AND CONTROL METHOD THEREOF |
摘要 |
PURPOSE: An ATM cell scheduler and control method thereof is provided to decrease the loss of a memory and maintain a transmission at an accurate transmission rate when using a time slot ring by designating a low transmission rate using a small size of the time slot ring. CONSTITUTION: A main time slot ring(220) increase a pointer of a slot ring when the number of N cell time slots elapse. A sub-time slot ring(221) increases a pointer according to 1 cell time slot. A VC table(222) is controller by channel table pointers(223,224) using the main time slot ring(220) and the sub-time slot ring(221). The main time slot ring(220) records information regarding a channel table pointer for indicating an address of the VC table(222) and a header pointer and a tail pointer composed as a linked list type. Each of linked list has an address value of the VC table(222) and an address of the next linked list, and has a sub c2cs value calculated by a control unit. The sub-time slot ring(221) is mapped to a linked list defined as pointer information recorded in each record of the main time slot ring(220) by the control unit.
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申请公布号 |
KR20010055000(A) |
申请公布日期 |
2001.07.02 |
申请号 |
KR19990056033 |
申请日期 |
1999.12.09 |
申请人 |
INSTITUTE FOR ADVANCED ENGINEERING |
发明人 |
LIM, JONG UK |
分类号 |
H04L12/28;(IPC1-7):H04L12/28 |
主分类号 |
H04L12/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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