发明名称 |
SEMICONDUCTOR MEMORY AND DATA READ-OUT METHOD |
摘要 |
PURPOSE: To provide a semiconductor memory in which an access time in a burst mode is improved without increasing chip area and increasing power consumption. CONSTITUTION: A latch pulse selecting circuit 6 outputs each of inputted control signal SALF and control signal SALS as a latch pulse SAL0A for a first latch group in a latch circuit 7 or a latch pulse SAL1A for a second latch group by a control signal CA0T. A Y selector 12 is connected through a Y switch to which a digit line corresponding to a sense amplifier circuit 8 is connected by control signals YS0-YS31 inputted from a column decoder circuit 11. The sense amplifier circuit 8 is composed of sense amplifiers of 256 pieces, and performs data discrimination of signals YD0-YD127 from the Y selector 12. The latch circuit 7 latches the data signals DT0-DT127 from the sense amplifier circuit 8 to the first latch group and the second latch group by the latch signal SAL0 or SAL1.
|
申请公布号 |
KR20010051091(A) |
申请公布日期 |
2001.06.25 |
申请号 |
KR20000061190 |
申请日期 |
2000.10.18 |
申请人 |
NEC CORPORATION |
发明人 |
EGAWA TONOMI;YAMAZAKI KAZUYUKI |
分类号 |
G11C17/18;G11C7/10;G11C8/00;G11C11/41;(IPC1-7):G11C8/00 |
主分类号 |
G11C17/18 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|