发明名称 Architecture for increasing the number of digital channels which can be processed in a channel bank
摘要 A double density channel bank architecture compatible with an existing D4 backplane and D4 channel units transmits or receive PCM data on the PAM bus, while simultaneously transmitting or receiving PCM data on the PCM bus. A double density channel unit (CU) provides data for two transmit and two receive T-1 timeslots to increase the capacity of a D4 channel bank from 48 channels to 96 channels. Channel bank timing of PCM data on the PAM bus avoids contention between the PCM data and PAM data. The double density CU's are provided with means for converting analog signals to PCM format.
申请公布号 GB2357016(A) 申请公布日期 2001.06.06
申请号 GB20000019725 申请日期 2000.08.10
申请人 * HUBBELL INCORPORATED 发明人 THEODORE A * SCHWEITZER;DAVID O * CORP;ERIK G * DRAGOS
分类号 H04M3/00;H04Q1/10;(IPC1-7):H04M3/00;H04Q11/04 主分类号 H04M3/00
代理机构 代理人
主权项
地址