| 摘要 |
<p>A convolutional interleaver or deinterleaver comprises an address signal generator for repeatedly generating [(B-1)N/2]+1 sequences of address signals, where B is a desired interleave depth and N is a value equal to or greater than the number of data bytes in a R-S block of the data stream. Each of the sequences corresponds to a respective row of a B column matrix, the first column of which comprises [(B-1)N/2]+1 consecutively numbered values. Each remaining column comprises the preceding column rotated by an integer multiple of N/B. The address signals are applied to a memory having [(B-1)N/2]+1 storage locations for reading the data stored at the address memory location and then writing the current data byte to the same memory location.</p> |
