BUS ARBITRATION IN LOW POWER SYSTEM

摘要

A data processing system and associated methods are disclosed for conserving power in a data processing system that includes a processor core and system circuitry coupled to the processor core. A first method includes entering a low power state by the processor core and the system circuitry and enabling bus arbitration by the processor core while the processor core remains in the low power state. One embodiment of the present invention further contemplates a method of conserving power in a data processing system by granting bus access to a requesting device and entering a power conservation mode by the processor core in response thereto. Bus operations are then performed while the processor core remains in the power conservation mode. Another embodiment still further contemplates a method of debugging a data processing system in a debug state is entered by the processor core and the system circuitry and, thereafter, bus arbitration is enabled by the processor core while the processor core remains in the debug state.