| 摘要 |
<p>PURPOSE: To precisely adjust the delay time of a clock signal, and to correctly operate phase comparison in a semiconductor integrated circuit on which a delay circuit and a DLL circuit are loaded. CONSTITUTION: A delay circuit is provided with plural serially connected interpolating circuits operating as a phase adjusting circuit or a delay stage. In this case, the delay time of the clock signal can be precisely adjusted by using the interpolating circuit. A phase comparator circuit compares a phase of a reference clock signal with the phase of a delay clock signal. A control circuit applies ratio information to each interpolating circuit based on the compared result of the phase comparator circuit so that the phase of the reference clock signal can be made coincident with the phase of the delay clock signal. The phase of the delay clock signal is adjusted by controlling the delay circuit using the plural interpolating circuits so that the minimum unit of fine adjustment can be reduced. That is, even in the miconductor integrated circuit to which the referenced clock signal with high frequencies is supplied, the phase adjustment can be surely attained.</p> |
