发明名称 |
Memory cell configuration, method for fabricating it and methods for operating it |
摘要 |
A memory cell configuration contains a multiplicity of memory cells in a semiconductor substrate. Each of the memory cells has a selection transistor connected between a bit line and a storage element. The memory cells can each be driven via a first word line and a second word line, the first word line and the second word line crossing one another. The memory cell configuration is, in particular, a DRAM configuration.
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申请公布号 |
US6229169(B1) |
申请公布日期 |
2001.05.08 |
申请号 |
US19980213724 |
申请日期 |
1998.12.17 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
HOFMANN FRANZ;KRAUTSCHNEIDER WOLFGANG;ROESNER WOLFGANG;RISCH LOTHAR;SCHLOESSER TILL;BASSE PAUL-WERNER |
分类号 |
H01L21/8242;H01L21/8246;H01L27/105;H01L27/108;H01L27/115;(IPC1-7):H01L27/108 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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