| 摘要 |
PURPOSE: A phase locked loop is provided to control the peak level of an output signal to minimize consumption power. CONSTITUTION: A phase locked loop includes the first frequency divider(110) for M-frequency-dividing an input signal with a predetermined frequency to generate the first signal, a phase detector(120) for comparing the first signal and the second signal having the second frequency to output the phase difference of the two signals, and a charge pump circuit(130) for generating a charge pump signal corresponding to the difference signal. The phase locked loop further has a loop filter(140) for filtering high frequency components from the charge pump circuit, and a voltage controlled oscillator(150) for generating an output signal having a frequency corresponding to the filtered signal. The phase locked loop also includes a frequency divider(160) for N-frequency dividing the output signal to generate the second signal with the second frequency, and a phase synchronization detector(170) for generating a phase synchronous signal that indicates if the input signal and output signal accord with each other at the transfer time of the first signal. The voltage controlled oscillator includes a voltage controlled oscillating unit(152) for generating the output signal having the frequency corresponding to the filtered signal and creating the first and second phase delayed signals having the same frequency as that of the output signal but having different phases, and a gain control unit(154) for controlling the gain of the output signal, the first and second phase delayed signals in response to an external gain control signal.
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