| 摘要 |
PURPOSE: To obtain an offset adding circuit which can set an offset independent from the potential of a signal read out onto a bit line when a memory cell of a semiconductor memory is tested by adding an offset to the potential of a signal read out from the memory cell onto the bit line and monitoring the potential difference of the read out signal on the bit line. CONSTITUTION: An offset adding circuit OFk comprises a single transistor T1 and a single capacitor CD1 for one bit line BLNk. At the time of test, the transistor T1 is turned on by an offset effective signal OC1, an offset addition control signal OPL1 is pulled from low level to high level, and an offset adding voltage from the capacitor CD1 is superposed on the bit line BLNk through the transistor T1. According to the arrangement, an offset voltage can be generated independently from the potential of the bit line. |
