发明名称 REFERENCE BIAS CIRCUIT OF FLASH MEMORY
摘要 PURPOSE: A reference bias circuit is provided to prevent mis-operation as securing an enough margin for a main cell bias to compare a reference bias, which is a comparative voltage of a read sense amp, by averaging a current flowing in a large number of reference cells using the reference cells. CONSTITUTION: The circuit includes a reference cell portion(100), a bit line regulator(10), a current divider(200) and a read sense amp(13). The reference cell portion, in which N reference cells are parallelly connected, outputs a current of N times through a bit line as adding a current flowing by conduction of each of the N reference cells by an enabling signal. The bit line regulator regulates an output current of a bit line of the reference cell portion. The current divider, in which the current of N times regulated by the bit line regulator is inputted, generates a reference bias by dividing the current of N times into 1/N. The read sense amp, in which the reference bias of the current divider is inputted, compares the inputted reference bias with a bias of the main cell and then reads a data of the main cell according the comparison result.
申请公布号 KR20010026178(A) 申请公布日期 2001.04.06
申请号 KR19990037391 申请日期 1999.09.03
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 KOO, JA GEUN
分类号 G11C16/02;(IPC1-7):G11C16/02 主分类号 G11C16/02
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