发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To improve the reliability and manufacturing yield of a minute MISFET(metal insulator semiconductor filed effect transistor) by suppressing the recess of a silicon oxide film being buried in an element separation groove. SOLUTION: At the lower part of a silicon nitride film 3 that becomes a mask when a substrate 1 of an element separation region is etched for forming a groove 5a, an amorphous silicon film (buffer film) 16 is provided. When the silicon nitride film 3 and the amorphous silicon film 16 are eliminated after the element separation groove is formed, the surface of a silicon oxide film 7 being buried to the element separation groove is set higher by the amount of the film thickness of the silicon nitride film 3 and the amorphous silicon film 16, thus preventing the height of the surface from greatly retreating (being recessed) downward as compared with the surface of the substrate 1 of an active region even when the silicon oxide film 7 is etched in a subsequent wet etching process.
申请公布号 JP2001085679(A) 申请公布日期 2001.03.30
申请号 JP19990256265 申请日期 1999.09.09
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 SUZUKI NORIO;HASHIMOTO NAOTAKA;MIURA YAICHIRO;SAKANISHI KOICHIRO;KANDA TAKAYUKI;HORIBE SHINICHI;ICHIZOE HIROYUKI
分类号 H01L21/76;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L21/76
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