Semiconductor memory circuit and redundancy control method

摘要

In a semiconductor memory device having redundant memory cells and sense amplifiers, when a redundant memory cell is accessed in place of a defective memory cell, the sense amplifier to which the defective memory cell is coupled and the redundant sense amplifier to which redundant memory cell is coupled are both activated simultaneously. Access to the defective memory cell is redirected to the redundant memory cell by switching data paths on a data bus to which both sense amplifiers are coupled. High-speed access is possible, because activation of the sense amplifiers and switching of the data paths take place concurrently.