| 摘要 |
An asymmetry measuring apparatus is provided which comprises: dividing means for dividing read data output from a read data generator in data storing means; a DC level converter for converting the duty ratio of a signal divided by the dividing means to a DC voltage level; and DC voltage measuring means for measuring the output voltage of the DC level converter. By virtue of the above construction, the asymmetry measuring apparatus does not need a lot of time for measurement, causes no significant measurement error, is suitable for mass production, and creates no quantization error at the time of counting of a reference clock in time measurement.
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