发明名称 |
Electrically programmable memory cell array, using charge carrier traps and insulation trenches |
摘要 |
An electrically programmable memory cell array is formed of memory cells, which include a vertical MOS transistor. The MOS transistor has a gate dielectric of a material with charge carrier traps. The memory cells are disposed along opposite edges of striplike, parallel insulation trenches. The width and spacing of the insulation trenches are preferably identical. The space required per memory cell of the memory cell array is 2F2, where F is the minimum structural size in the technology employed. The memory cells are programmed by selectively injecting electrons into the gate dielectric.
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申请公布号 |
US6191459(B1) |
申请公布日期 |
2001.02.20 |
申请号 |
US19970780488 |
申请日期 |
1997.01.08 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
HOFMANN FRANZ;KRAUTSCHNEIDER WOLFGANG;WILLER JOSEF;REISINGER HANS |
分类号 |
H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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