| 摘要 |
A ferroelectric memory device includes a plate line driving circuit, dummy plate line driving circuit, constant voltage generator and variable voltage generating circuit. The plate line driving circuit pulse-drives a plate line associated with a memory cell selected at the time of data readout. The dummy plate line driving circuit pulse-drives a dummy plate line associated with a dummy cell connected to a reference bit line which makes a complementary pair with a bit line connected to the selected memory cell. The constant voltage generator generates a voltage which does not depend on an external power supply voltage and the temperature and is kept substantially constant and applies the voltage to the plate line driving circuit as a power supply voltage. The variable voltage generating circuit generates a plurality of substantially constant voltages which do not depend on an external power supply voltage and the temperature and applies a voltage selected from the plurality of voltage levels according to the high level or low level of the bit line to the dummy plate line driving circuit as a power supply voltage.
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