发明名称 METHOD OF FORMING SOLDER BUMPS AND WIRING BOARD, SEMICONDUCTOR ELEMENT, SEMICONDUCTOR PACKAGE AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To form solder bumps having a large volume, even with narrow pitches and provide a wiring board, a semiconductor element and a semiconductor package having high connection reliability. SOLUTION: A jig 10, having through-holes 12 for forming solder bumps at prescribed sites, is placed on the surface of a wiring board or a semiconductor element. A solder paste 27 is filled in the through-holes 12 for forming solder bumps by printing the solder paste 27 via a screen 23 for printing and/or a mask 24 for printing. After solder bumps 34 are formed by melting the filled solder paste, the jig 10 for forming solder bumps is removed from the wiring board or the semiconductor element.
申请公布号 JP2001044231(A) 申请公布日期 2001.02.16
申请号 JP19990217171 申请日期 1999.07.30
申请人 HITACHI CHEM CO LTD 发明人 SHIMADA OSAMU;SUZUKI FUMIO
分类号 H05K3/34;H01L21/60;H01L23/12 主分类号 H05K3/34
代理机构 代理人
主权项
地址