发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To execute a scan test of a logic circuit without driving a macro cell. SOLUTION: A semiconductor integrated circuit 1 has a plurality of scan flip-flops SFF1-SFF6 for switching a data path between a normal operation mode and a scan test mode, logic circuits 16 and 17 to be tested with the use of the scan flip flops, a macro cell 18 not to be tested which is connected to the logic circuits 16 and 17, and bypass paths 19 and 19 for bypassing the macro cell 18. At a scan test of logic circuits 16 and 17 in a scan test mode, the macro cell 18 is bypassed by the bypass paths 19 and 19, whereby the need of driving the macro cell specially for the scan test is eliminated.
申请公布号 JP2001042008(A) 申请公布日期 2001.02.16
申请号 JP19990216775 申请日期 1999.07.30
申请人 SANYO ELECTRIC CO LTD 发明人 FUJII YOSHINARI;SHIRAISHI TAKEHISA;YAMADA SETSU
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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