| 摘要 |
PROBLEM TO BE SOLVED: To suppress increasing a circuit area and chip area by an address bus and data bus by arranging a memory and a test circuit constituted near the memory and testing the memory at a prescribed position in a chip peripheral region in which a circuit near an external interface is formed. SOLUTION: Memories 12a, 12b and test circuits 13a, 13b are collected at a prescribed position, that is, near an external interface 14. Address buses 21a, 22a are used as an original data bus between logics 11a, 11b and the memories 12a, 12b through the interface 14, further, data buses 21b, 22b also are used. Also the address bus 21a and the data bus 21b are used at the time of a test of the memories 12a, 12b using the test circuits 13a, 13b, and the address bus 21a and the data bus 21b are shared at the time of access and the test between logic sections 11a, 11b and the memories 12a, 12b.
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