| 摘要 |
A pair of coupling transistors are connected in series with isolation transistors in each of a plurality of column node circuits coupled to first and second arrays of memory cells arranged in rows and columns. The coupling transistors for the complimentary digit lines in each column node circuit are rendered non-conductive in the event memory cells connected to the coupling transistors through digit lines of the first and second array are defective. As a result, defective memory cells in the first and second arrays are isolated from sense amplifiers in the column node circuits so that the sense amplifiers cannot affect non-defective memory cells.
|
