| 摘要 |
PROBLEM TO BE SOLVED: To sharply reduce variations in the thickness of an interlayer insulating layer by surely forming insulating sidewalls for protecting a conductive line during the etching step for formation of a via hole. SOLUTION: An Si3N4 layer 15 and an SiO2 layer are formed on a lower interconnection 30 of a laminated structure, which includes a conductive line 12 and an SiO2 protective layer 13. Then, the layers 15 and 16 are polished by a CMP method until the layer 13 is exposed. When a via hole 20 which reaches the line 12 is formed in a self-aligned manner by having layer 13 etched, portions 15a and 15b of the layer 15 which extend along both sides of the interconnection 30 are used as sidewalls for protecting the line 12.
|
