发明名称 |
PLL circuit and phase lock detector |
摘要 |
The circuit has a low pass filter (30) connected between two charge pump circuits and a voltage controlled oscillator (107) to smooth output of the pump circuits. A lock detector detects if an oscillation clock maintains a constant phase difference relative to a reference clocks phase. A selecting circuit operates the respective pump circuits when the oscillation clock maintains/does not maintain constant phase difference. An independent claim is also included for an image signal processing apparatus for producing chrominance information and luminance information. |
申请公布号 |
EP0855802(A3) |
申请公布日期 |
2001.01.17 |
申请号 |
EP19980300353 |
申请日期 |
1998.01.19 |
申请人 |
SANYO ELECTRIC CO., LTD. |
发明人 |
KIYOSE, MASASHI;ITO, HIROYA |
分类号 |
H03L7/089;H03L7/095;H03L7/099;H03L7/10;H03L7/107;H04N9/45;H04N11/14 |
主分类号 |
H03L7/089 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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