METHOD AND APPARATUS FOR CONTROLLING DATA INPUT OF DDR SDRAM

摘要

PURPOSE: A method and an apparatus for controlling data input of a DDR SDRAM(Double Data Rate Synchronous DRAM) are provided which prevent the generation of mis-operation in a high speed operation. CONSTITUTION: The device prevents a write data from being transferred to a global data bus during a read operation after a write operation. The apparatus includes: a data input unit(430) generating a data signal inputted from the external as a rising data signal synchronized to a rising edge of a data strobe signal and a falling data signal synchronized to a falling edge of the data strobe signal respectively; a data align unit generating a pulse signal of a clock align rising data and a clock align falling data which are aligned by synchronizing the rising data signal and the falling data signal to an external clock signal; a switching unit(470) converting the clock align rising data and the clock align falling data into the first and the second internal input pulse signal in response to a control signal; a global data bus input unit(490) transferring the first and the second internal input pulse signal to the first and the second global data bus in response to the control signal; and a control part(480) enabling or disabling the global data bus input unit in response to a read command signal and a write command signal.