发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device provided with a test circuit and a redundancy circuit permitting to reduce the number of memory cells for the redundancy circuit by configuring a RAM logically provided with a redundancy circuit by building in the memory cell portion for redundant bits as the redundancy circuit by using another RAM, and thus, eliminating the need for changing the original RAM in the arrangement. SOLUTION: This semiconductor integrated circuit device is provided with RAM 1 having plural memory cell groups including memory cells of the number in accordance with the number of words, and RAMs 30, 40, 50, 60 as a redundancy circuit having memory cells of the number not more than the number of the words of RAM 1. A selection circuit 5 selects either data of RAM 1 or that of RAMs 30, 40, 50, 60, and uses RAMs 30, 40, 50, 60 as the redundancy circuit.
申请公布号 JP2001006391(A) 申请公布日期 2001.01.12
申请号 JP19990174002 申请日期 1999.06.21
申请人 MITSUBISHI ELECTRIC CORP 发明人 MAENO HIDESHI
分类号 G11C29/04;G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/04
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