| 摘要 |
A delay circuit based on gate delay enables precise adjustment of a delay value. The delay circuit is composed of a plurality of p-channel transistors and n-channel transistors connected in series which are provided with capabilities that differ, ranging from the transistors closer to a power supply to the transistors closer to an output end so as to change the output drive capability and the input capacity independently, thereby improving the adjustment accuracy of the delay value of the circuit.
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