发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To improve accuracy of an AC test of memory with theoretical function and the like and to improve reliability by giving a function in which any of input data is selected in an alternative way conforming to a theoretical value of a bit corresponding to input data and outputted to a theoretical section at the time of AC test to a read-out circuit. SOLUTION: Test data of logic '0' or '1' previously written in a test data array TRAY is selectively read out conforming to a theoretical value of bits corresponding to internal input data di10-di1i, and transmitted to a theoretical section. Also. as test data written in a storage area corresponding to word lines TW0 and TW1 of the test data array TRAY is set so as to be complementary theoretical value each other, complementary test data can be alternately read out by making alternately the word lines TW0 and TW1 a selection state. Thereby, an AC test can be executed effectively and efficiently in the form including a dynamic characteristic.
申请公布号 JP2000331500(A) 申请公布日期 2000.11.30
申请号 JP19990135551 申请日期 1999.05.17
申请人 HITACHI LTD 发明人 NISHIYAMA MASAHIKO;NAKAHARA SHIGERU
分类号 G11C11/413;G11C29/00;G11C29/12;H01L27/10;(IPC1-7):G11C29/00 主分类号 G11C11/413
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