发明名称 Integrated circuit I/O buffer with 5V well and passive gate voltage
摘要 An integrated circuit buffer includes a core output terminal, a pad terminal, a pad pull-down transistor, a pad pull-up transistor, a pull-down control circuit and a pull-up control circuit. The pad pull-down transistor and the pad pull-up transistor are coupled to the pad terminal and have pull-up and pull-down control terminals, respectively. The pull-down control circuit is coupled between the core output terminal and the pull-down control terminal. The pull-up control circuit is coupled between the core output terminal and the pull-up control terminal. A pull-up voltage protection transistor is coupled in series between the pad pull-up transistor and the pad terminal and has a control terminal which is coupled to the pad terminal through a voltage feedback circuit.
申请公布号 US6130556(A) 申请公布日期 2000.10.10
申请号 US19980098099 申请日期 1998.06.16
申请人 LSI LOGIC CORPORATION 发明人 SCHMITT, JONATHAN;HOM, GARY;HUNG, LUONG
分类号 H03K19/003;(IPC1-7):H03K19/018 主分类号 H03K19/003
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