发明名称 ATM CELL FORMAT CONVERSION CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide an ATM cell format conversion circuit with a simple configuration that can always output a cell whose format is accurately converted. SOLUTION: A dual port memory 1 is provided with a memory space of 53+X bytes or over per cell so as to reserve a nonuse area of n bytes (n>=X) to which data are not written in advance so that respective data are written in a fixed address of each ATM cell at all times. In the case of reading a cell from the dual port memory 1, a read counter A7 repeats counting for a period of '53+X' sequentially from 'n-X' until 'n+52'. A read counter B6 is incremented by 1 every time the read counter A7 is circulated and repeats count-up in a range of '0'-'N'. An information insertion circuit 11 inserts information to an idle area in X bytes of a read cell.</p>
申请公布号 JP2000278278(A) 申请公布日期 2000.10.06
申请号 JP19990078050 申请日期 1999.03.23
申请人 NEC MIYAGI LTD 发明人 IZAWA SHIGEMI
分类号 H04L12/28;H04Q3/00;(IPC1-7):H04L12/28 主分类号 H04L12/28
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