发明名称 FORMATION METHOD FOR FINE CONTACT HOLE AND FINE VIA HOLE
摘要 PROBLEM TO BE SOLVED: To form a fine contact hole and a fine via hole by using a pattern formed by lithography, by a method wherein, at a stage at which an interlayer film is formed to be thick, a hole is formed by a taper etching operation and its upper part is polished by a CMP operation. SOLUTION: A wiring 3 is formed on a first interlayer film 1 on a semiconductor substrate on which a metal wiring is formed. A second interlayer film 2 is formed so as to cover the wiring. A global flattening operation is performed. After that, a resist layer 4 having a hole 6 in a prescribed pattern by lithography is formed on the second interlayer film 2. Then, a taper etching operation by a dry etching operation is execute to the second interlayer film 2 which is exposed by the hole 6. A via hole 7 is formed in a forward taper shape at a taper angleθ. After that, the resist layer 4 is removed by an ashing process and a wet exfoliation process. After that, the surface of the second interlayer film 2 is polished by a CMP operation.
申请公布号 JP2000269193(A) 申请公布日期 2000.09.29
申请号 JP19990070437 申请日期 1999.03.16
申请人 NEC CORP 发明人 MIYAMOTO HIDENOBU
分类号 H01L21/302;H01L21/28;H01L21/3065;H01L21/768;(IPC1-7):H01L21/306 主分类号 H01L21/302
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