发明名称 EMULATOR AND MICROCOMPUTER
摘要 PROBLEM TO BE SOLVED: To reduce the capacity of a trace memory by turning information relating to a memory address stored in the trace memory to information in which a low order bit string is combined with a bit string for which the high order bit string of the memory address when a microcomputer is operated is encoded. SOLUTION: The microcomputer 33 and evaluation chip 39 of this emulator 31 performs processing in behalf of the microcomputer of a user system 35. The evaluation chip 39 converts address information from the microcomputer 33 to write data (address information provided with encoded high order bits) to a trace memory 41. The address information of the microcomputer 33 is outputted as the write data from the evaluation chip 39 to the trace memory 41. In this case, the information relating to the memory address stored in the trace memory 41 is composed by combining low order bits with the bit string in which the high order bit string of the memory address at the time of the operation of the microcomputer 33 is encoded.
申请公布号 JP2000267876(A) 申请公布日期 2000.09.29
申请号 JP19990072611 申请日期 1999.03.17
申请人 TOSHIBA CORP 发明人 TANABE TETSUYA
分类号 G06F11/28;G06F11/22 主分类号 G06F11/28
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