| 摘要 |
PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, where an inter-wiring pitch can be lessened without reducing an alignment margin, a level difference is prevented from occurring newly in wirings, an alignment margin can be restrained from being lessened even if a wiring is lessened in line width without changing an inter-wiring pitch, and resultantly wirings can be lessened in inter-wiring parasitic capacitance. SOLUTION: An insulating film is formed on an first interlayer insulating film 2, the insulating film is patterned so as to cover a through-hole forming region, and a projection 3 is formed. A conductive film is formed on all the surface and patterned into a first metal wiring layer 4. A second interlayer insulating film 5 is formed on all the surface, and then the surface of the second interlayer insulating film 5 is polished through a chemical mechanical polishing method until the surface of the first metal wiring layer 4 formed on the projection 3 is exposed. A conductive film is formed on all the surface, and the conductive film is patterned so as to be electrically connected to the first metal wiring layer 4 whose surface is exposed, and an island-like metal film 6 is formed.
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