D/A conversion apparatus

摘要

To provide a D/A conversion apparatus that can minimize the increase in the amount of circuitry if the number of output levels is increased, a digital input value, input for each sampling clock, is first converted by a digital filter and a noise shaper into a word length limited digital signal with a high sampling frequency. The output of the noise shaper is mapped by a decoder to n m-valued signals a "1" at a time in a cyclic fashion progressing from one signal to the next so that the sum of the n m-valued signals becomes equal to the digital input value; thereafter, the n m-valued signals are converted by n m-valued D/A converters into corresponding analog signals which are then summed together by an analog adder to produce an analog output signal. The term "cyclic" means not only that one digital input value is mapped to the n m-valued signals a "1" at a time in a cyclic fashion progressing from one signal to the next, but also that the mapping of the present digital input value to the n m-valued signals is performed starting with the m-valued signal that immediately follows the m-valued signal to which the preceding digital input value was last mapped. <IMAGE>