发明名称 |
Semiconductor device having an improved interconnection and method for fabricating the same |
摘要 |
P+-type source/drain regions for load transistors and N+-type source/drain regions for driver transistors are connected by means of P+-type source/drain region outgoing lead and N+-type source/drain region outgoing lead via direct contact holes. The drain region outgoing lead for the load transistors and ground lead are formed in a three-dimensionally overlapping manner, and the drain region outgoing lead for the driver transistors connected to memory nodes on one side and the drain region outgoing lead for the load transistors connected to memory nodes on the other side are also formed in a three-dimensionally overlapping manner, whereby memory node charge accumulators are constituted.
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申请公布号 |
US6097103(A) |
申请公布日期 |
2000.08.01 |
申请号 |
US19980081283 |
申请日期 |
1998.05.20 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
ISHIGAKI, YOSHIYUKI |
分类号 |
H01L21/768;H01L21/8234;H01L21/8244;H01L27/088;H01L27/11;(IPC1-7):H01L27/11 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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