摘要 |
When an element of an internal circuit is arranged in the vicinity of an input/output terminal of an LSI chip, electrostatic break down is caused in an internal circuit element by discharge current generated between an input/output terminal and a grounding terminal or a power source terminal. Therefore, the elements are arranged with a distance to cause dead space therebetween to make down-sizing of the LSI chip difficult. Therefore, a resistor is disposed between an input/output terminal and a protection element connected thereto. The resistor causes increasing of resistance of a current path from the input/output terminal to the grounding terminal, at the common wiring. Thus influence of the electrostatic break down for the element of the internal circuit can be restricted to permit location of the resistor to permit the internal circuit element to be arranged in the vicinity of the protection element of the input/output terminal. Thus, a problem of the dead space can be solved and down-sizing of the LSI is enabled. <IMAGE> |