| 摘要 |
A logic amplitude level converter circuit of the present invention includes voltage biasing means for obtaining a signal being amplified swinging relative to the logic threshold voltage of an output-stage buffer circuit in response to the high-low level change of an input signal having a low logic amplitude, a pulse amplifier circuit for obtaining a high logic amplitude signal by pulse-amplifying the signal being amplified, and the output-stage buffer circuit for obtaining an inverted signal of the high logic amplitude signal in response to the high logic amplitude signal as an input.
|
