发明名称 |
SEMICONDUCTOR MEMORY DEVICE HAVING MULTI-BANK STRUCTURE |
摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device of a multi-bank structure improving chip efficiency. SOLUTION: The array of the semiconductor memory device 100 is separated to plural banks 120, and respective banks are provided with plural memory cells for storing information. The semiconductor memory device 100 is provided with a selection signal generation circuit 160 and a voltage boost circuits 140-146 further. The selection signal generation circuit 160 generates successively a selection signal according to a clock signal, and respective voltage boost circuits generate a high voltage supplied to at least one selected bank according to the corresponding selection signal during normal operation. The number of voltage boost circuits is less than the number of banks.
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申请公布号 |
JP2000156079(A) |
申请公布日期 |
2000.06.06 |
申请号 |
JP19990322861 |
申请日期 |
1999.11.12 |
申请人 |
SAMSUNG ELECTRONICS CO LTD |
发明人 |
CHA GI-WON;RIN KEINAN |
分类号 |
G11C11/401;G11C5/14;G11C8/12;G11C11/407;(IPC1-7):G11C11/401 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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