发明名称 ALIGNMENT METHOD FOR POWER LINE OF INTEGRATED CIRCUIT IN MICRO PROCESSOR
摘要 PURPOSE: A microprocessor is provided to reduce the loss of electric power and supplied voltage by maintaining the normal operation of a cache memory. CONSTITUTION: An integrated circuit of a microprocessor is composed of an operator(ALU) and registers, a controller and a logic block(10) including a data bus, an instruction cache(12), and a data cache(14). The logic block is produced for being operated under 1V for a power voltage. On one hand, the instruction cache and the data cache are produced for being operated under 1.8-2V for the power voltage. Therefore, after finishing packaging, 1V is fed through an outer pin and a bonding wire at a voltage pad(32) of a first power in the integrated circuit of the microprocessor. Herein, the microprocessor is mounted on a microprocessor application system board, and 1.8-2V is fed at a second power voltage pad. Thus, a consumption power of the microprocessor is remarkably reduced according to the reduction of the supplied voltage for the logic block. In addition, the cache memory is normally operated because the high power voltage of 1.8-2V is additionally fed to the cache memory.
申请公布号 KR20000030923(A) 申请公布日期 2000.06.05
申请号 KR19980038686 申请日期 1998.09.18
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 GWAK, JIN HO
分类号 H01L21/60;(IPC1-7):H01L21/60 主分类号 H01L21/60
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