METHODS AND APPARATUS FOR DETECTING THE COLLISION OF DATA ON A DATA BUS IN CASE OF OUT-OF-ORDER MEMORY ACCESSES OR DIFFERENT TIMES OF MEMORY ACCESS EXECUTION

摘要

A system (2000) for reordering commands to achieve an optimal command sequence based on a target response restriction comprising a data queue (2006) coupled to a command queue (2004) for storing a burst bit, a write bit and a time indicating when the data transfer for an already issued command to the target device will appear on the data bus. The system also includes a collision detector (2002) coupled to the data queue (2006) and the command queue (2004) for detecting possible collisions on the data bus between to be issued command stored in the command queue (2004) and already issued commands stored in the data queue (2006). A queues and link controller (2008) is coupled to the collision detector (2002), the data queue (2006) and the command queue (2004) to store and reorder commands to be issued wherein the controller calculates the new issue time of commands and a time when the corresponding data transfer appears on the data bus.