发明名称 |
CLOCK GENERATING CIRCUIT |
摘要 |
PURPOSE: A clock generating circuit is provided to prevent a malfunction of system by improving an unstable oscillation caused by changing of operating point. CONSTITUTION: A clock generating circuit comprises: an oscillating element for starting an operation by an inputted trigger signal and outputting an oscillating signal swinging by reference to an operating point having a predetermined level; a transferring element for transferring the output of the oscillating element to the input of the oscillating element in response to a first and a second selection signal; a selection signal generating element for outputting the first and second selection signals after inverting and delaying a stop signal to stop the oscillation operation of the oscillating element; a pull-down element for pulling-down the potential of the input terminal of the oscillating element to the ground potential in response to the second selection signal; and a clock generating element for outputting a first and a second clock signals by inverting and delaying the output signal of the oscillating element.
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申请公布号 |
KR20000026576(A) |
申请公布日期 |
2000.05.15 |
申请号 |
KR19980044171 |
申请日期 |
1998.10.21 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, DONG HWAN |
分类号 |
H03K5/00;(IPC1-7):H03K5/00 |
主分类号 |
H03K5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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