发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory in which generating an operation mode signal for a test dedicated is prevented at the time of use by a user. SOLUTION: This device is a semiconductor memory which has a test mode decoder 12 decoding plural input signals setting an operation mode for a test dedicated and generating a signal specifying an operation mode for a specific test dedicated and which can set operation modes for various tests, further the device has a pad 13 for testing a probe making the test mode decoder effective at the time of applying voltage.
申请公布号 JP2000123598(A) 申请公布日期 2000.04.28
申请号 JP19980293980 申请日期 1998.10.15
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SADAKATA HIROYUKI;AGATA MASASHI
分类号 G11C11/401;G01R31/28;G01R31/3185;G11C29/00;G11C29/14;(IPC1-7):G11C29/00;G01R31/318 主分类号 G11C11/401
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