| 摘要 |
PURPOSE: A super scalar microprocessor is provided to maintain a relatively high-speed decoding by calculating a linear address quickly. CONSTITUTION: In a super scalar microprocessor, a pre decode part is configured to generate a plurality of pre decode bits for each command byte. A plurality of pre decode bits associated with each command byte are referred to as a pre decode tag. A command alignment part dispatches a variable length command to a plurality of decode parts by use of the pre decode tag. The plurality of decode parts form a direction location fixed in the supper scalar microprocessor. The decode part detects an exact place of an operation code, a displacement, an immediate, and a scale-index byte.
|
