发明名称 SYSTEM AND METHOD FOR DELAYING EXCEPTION GENERATED DURING SPECULATIVE EXECUTION
摘要 PROBLEM TO BE SOLVED: To provide a method for supporting the speculative execution of an instruction set. SOLUTION: The method is provided with a step (64) for evaluating the instructions of the instruction set during execution to judge whether the individual instruction is speculative or not, a step (70) for evaluating each of the speculative instructions to judge whether it generates an exception and a step (74) for encoding a deferred exception token(DET) to an unused register value of the register of CPU concerning each speculative instruction generating an exception. This system is provided with a circuit for evaluating the instruction of the instruction set to judge whether the individual instruction is speculative or not, a circuit for evaluating each of the speculative instructions to judge whether it generates an exception and a circuit encoding DET to the unused register value of the register of CPU in response to an assessing means.
申请公布号 JP2000112758(A) 申请公布日期 2000.04.21
申请号 JP19990267022 申请日期 1999.09.21
申请人 HEWLETT PACKARD CO <HP> 发明人 GAUTAM B DOSHI;PETER MARKSTEIN;KARP ALAN H;JEROME C HACK;GLENN T COLON-BONNET;MICHAEL MORRISON
分类号 G06F9/38;G06F9/45;G06F9/46;G06F9/48;(IPC1-7):G06F9/38 主分类号 G06F9/38
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