DEPOSITED THIN BUILD-UP LAYER DIMENSIONS AS A METHOD OF RELIEVING STRESS IN HIGH DENSITY INTERCONNECT PRINTED WIRING BOARD SUBSTRATES

摘要

The present invention provides a method for minimization of cracking due to the mechanical stresses at the interfaces of the metal and dielectric materials in the printed wiring substrates of high density interconnects. A high density interconnect printed wiring board substrate has a first patterned conductive layer (6) formed over an upper surface of the substrate. The patterned conductive layer (6) includes multiple conductive lines each having edges that define the boundaries of the conductive lines. The method of the invention forms a composite dielectric layer (2) over the first patterned conductive layer (6) and between the edges of the conductive layer (6). The composite dielectric layer (2) includes particles suspended in the layer in order to reduce the likelihood and prevent any cracks that form in the layer from propagating through the entire length of the layer. A thin film conductive layer (4) is then formed over the composite dielectric layer (2) and a thin film dielectric layer (5) is formed over the thin film conductive layer (4). In a preferred embodiment, the composite dielectric layer (2) is a Ciba Probimer layer deposited from a curtain coating process.