发明名称 Method and apparatus for reducing system snoop latency
摘要 In multi-processor systems which have separated the system bus from the I/O bus, a Shadow Directory is introduced into the memory controller for reducing bottlenecks that occur from the processors snooping data cache in the I/O devices residing on the I/O bus. This Shadow Directory is advantageously employed in a system, such as the PowerPc architecture which distinguishes between the types of data that can be cached in I/O devices. The Shadow Directory uses two First In First Out (FIFO) stacks for two different types of data. These FIFO stacks are then used for addresses placed on the system bus and I/O bus in order to reduce snoop latency times.
申请公布号 US6052762(A) 申请公布日期 2000.04.18
申请号 US19960755877 申请日期 1996.12.02
申请人 INTERNATIONAL BUSINESS MACHINES CORP. 发明人 ARIMILLI, RAVI KUMAR;KAISER, JOHN MICHAEL;MAULE, WARREN EDWARD
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
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