发明名称 SENSE AMPLIFIER CIRCUIT
摘要 PURPOSE: A sense amplifier circuit is provided to increase a latch margin. CONSTITUTION: In the sense amplifier circuit for detecting a little potential differential generated by a memory cell and amplifying the little potential differential up to rail-to-rail in a flip flop(1) in the sense amplifier circuit, a next stage buffer(2) receiving a pair of complementary signals outputted from the flip flop(1) is configured by two logic circuits. The two logic circuits are configured with a NOR circuit or a NAND circuit. In each logic circuit, one adjacent to a carrier supply source among at least two serial-connected transistors is common to the two logic circuits.
申请公布号 KR20000012017(A) 申请公布日期 2000.02.25
申请号 KR19990030730 申请日期 1999.07.28
申请人 NEC CORPORATION 发明人 MATSI YUJI;TAKAHASI HIROYUKI
分类号 G11C11/419;G11C7/06;G11C11/409;G11C16/06;(IPC1-7):G11C7/06 主分类号 G11C11/419
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